We have all debugged SOC and IP level issues using signal level waveforms. Its a tedious and laborious process. Are there any ways that can make design debug easier? Wouldn’t it be great if I could look at fully decoded transactions instead of signal toggles? In this series of posts, we will try to come up with the best way to look at some typical interfaces in order to reduce debug effort and increase productivity.
The Camera Serial Interface (CSI) is a specification defined by he MIPI Alliance. It defines a high performance interface between a camera sensor and a host processor. It allows the camera sensor to transfer pixel data to the host processor and allows the host processor to control the sensor. The CSI-2 specification uses the D-PHY phyiscal layer. Multiple data lanes can be used to increase data bandwidth. For even higher bandwidth applications, the C-PHY physical layer can be used.
The serial, multi-lane, nature of the CSI-2 interface makes it very difficult to figure out what is happening on the bus, by just looking at the waveform.
Typically, at the SOC level, engineers would like to ask the following questions while debugging CSI-2 related issues:
1. What packet is currently being transmitted on the CSI-2 bus?
2. When did the current frame start on the CSI-2 bus?
3. How many frames have been transmitted over the CSI-2 bus?
Can you answer these questions looking at the below example waveform of a CSI-2 interface?
Its possible, but very difficult to answer these questions by looking at a waveform. So what do we need? We need a protocol analyzer that can show the CSI-2 packets that are being transmitted on the D-PHY lanes. It should be able to merge the bits going over multiple lanes and show fully decoded CSI-2 packets. It should be able to show HBLANK and VBLANK events.
Below is how the same waveform is shown by our PDA soft protocol analyzer:
As you can see, the information presented by the PDA tool makes immediate sense as it shows fully decoded information. The amount of information you can glean from the PDA in 10 seconds will take 5 minutes or more if you use a waveform viewer only.
This is especially useful at system level debug as SOC level engineers might not know specification details. Using the PDA tool, even inexperienced design/verification engnineers can achieve high debug productivity. In PDA, they have a friendly tool that knows the protocol details.
When used along with a traditional waveform viewer, the PDA tool provides excellent debug visibility and traceability; from signal level to transaction level.