If you are new to the world of design and verification, you probably have a LOT of questions! One of them may pertain to an important element – the Clock Data Recovery. In this blog, we try and de-mystify this process. The purpose of designing various protocols is to transfer a set of information (data) … Continue reading Beginners Guide To Clock Data Recovery
Tag: soc
SoC Debug Made Easy!
With increasing complexity in today’s SoC designs, logic verification is one hurdle that all designers are eager to overcome. A majority of the verification effort is spent on debug. This is because typical SoCs consist of a variety of IPs and interfaces. In cases where data has to flow through multiple interfaces in order to … Continue reading SoC Debug Made Easy!
How to make your Waveform viewer SMART!
In this blog, we will look at the Protocol Debug Analyzer (PDA) tool can analyze Signal Dump files and provide transaction and other higher abstraction views. We will explore how the tool augments your Waveform viewer, allowing you to drill down from transaction to signal level details and vice-versa. We will use an example Signal Dump … Continue reading How to make your Waveform viewer SMART!
Reduce SOC debug task effort by 95%, go home at 5pm!
This is the excerpt for your very first post.
